Digital Design Verification Engineer (HDD Storage)
Marvell
Cordoba, Argentina
hace 2 días

About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.

Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions.

Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing.

If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

Marvell is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines.

These solutions address all segments of the hard disk drive (HDD) and solid state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.

Marvell talented team was very motivated to train promising engineer like you to become an excellent verification engineer with expertise in Universal Verification Methodology (UVM) and hard disk read channel technology.

Job Responsibilities :

  • Understand the hard disk read channel system level functionality of different components
  • Develop and maintain data storage verification environment in UVM (Universal Verification Methodology)
  • Define and review verification test plan with architecture team and design team
  • Verify the design with randomized functional parameters
  • Maintain regression and debug the failures in simulation environment
  • Report verification coverage of design features and parameters
  • Drive the verification coverage to reach 100% goal
  • Requirements :

  • Bachelor / Master degree in Computer Science, Electronic or related fields
  • Basic knowledge in VLSI logic design
  • Good understanding on Verilog, System Verilog and UVM (Universal Verification Methodology)
  • Good scripting skills in languages such as Perl, Tcl, or Python.
  • Good English communication skills (verbal and written)
  • The Perks

    With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We’ll give you all the tools you need to succeed so you can grow and develop with us.

    For additional information on what it’s like to work at Marvell, visit our page.

    Your Future

    Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance.

    If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

    All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

    Reportar esta oferta
    checkmark

    Thank you for reporting this job!

    Your feedback will help us improve the quality of our services.

    Inscribirse
    Mi Correo Electrónico
    Al hacer clic en la opción "Continuar", doy mi consentimiento para que neuvoo procese mis datos de conformidad con lo establecido en su Política de privacidad . Puedo darme de baja o retirar mi autorización en cualquier momento.
    Continuar
    Formulario de postulación